PIC18F26K83-I/SS 8bit Microcontrollers MCU 12BIT ADC2 64KB Flash 4KB RAM
♠ Product Description
| Product Attribute | Attribute Value |
| Manufacturer: | Microchip |
| Product Category: | 8-bit Microcontrollers - MCU |
| RoHS: | Details |
| Series: | PIC18(L)F2xK83 |
| Mounting Style: | SMD/SMT |
| Package / Case: | SSOP-28 |
| Core: | PIC18 |
| Program Memory Size: | 64 kB |
| Data Bus Width: | 8 bit |
| ADC Resolution: | 12 bit |
| Maximum Clock Frequency: | 64 MHz |
| Number of I/Os: | 25 I/O |
| Data RAM Size: | 4 kB |
| Supply Voltage - Min: | 2.3 V |
| Supply Voltage - Max: | 5.5 V |
| Minimum Operating Temperature: | - 40 C |
| Maximum Operating Temperature: | + 85 C |
| Packaging: | Tube |
| Brand: | Microchip Technology / Atmel |
| DAC Resolution: | 5 bit |
| Data RAM Type: | SRAM |
| Data ROM Size: | 1024 B |
| Data ROM Type: | EEPROM |
| Interface Type: | CAN, I2C, LIN, SPI, UART |
| Moisture Sensitive: | Yes |
| Number of ADC Channels: | 24 Channel |
| Product: | MCU |
| Product Type: | 8-bit Microcontrollers - MCU |
| Program Memory Type: | Flash |
| Factory Pack Quantity: | 47 |
| Subcategory: | Microcontrollers - MCU |
| Tradename: | PIC |
| Watchdog Timers: | Watchdog Timer, Windowed |
| Unit Weight: | 0.024671 oz |
♠ 28-Pin, Low-Power, High-Performance Microcontrollers with CAN Technology
The PIC18(L)FXXK83 is a full-featured CAN product family that can be used in automotive and industrial applications. The multitude of communication peripherals found on the product family, such as CAN, SPI, two I2Cs, two UARTs, LIN, DMX, and DALI can handle a wide range of wired and wireless (using external modules) communication protocols for intelligent applications. This family includes a 12-bit ADC with Computation (ADC2) extensions for automated signal analysis to reduce the complexity of the application. This, combined with the Core Independent Peripherals integration capabilities, enables functions for motor control, power supply, sensor, signal and user interface applications.
• C Compiler Optimized RISC Architecture
• Operating Speed:
- Up to 64 MHz clock operation
- 62.5 ns minimum instruction cycle
• Two Direct Memory Access (DMA) Controllers:
- Data transfers to SFR/GPR spaces from either Program Flash Memory, Data EEPROM or SFR/GPR spaces
- User-programmable source and destination sizes
- Hardware and software-triggered data transfers
• System Bus Arbiter with User-Configurable Priorities for Scanner and DMA1/DMA2 with respect to the main line and interrupt execution
• Vectored Interrupt Capability:
- Selectable high/low priority
- Fixed interrupt latency
- Programmable vector table base address
• 31-Level Deep Hardware Stack
• Low-Current Power-on Reset (POR)
• Configurable Power-up Timer (PWRT)
• Brown-Out Reset (BOR)
• Low-Power BOR (LPBOR) Option
• Windowed Watchdog Timer (WWDT):
- Variable prescaler selection
- Variable window size selection
- Configurable in hardware or software
