SPC560B50L1C6E0X 32bit Microcontrollers Power Architecture MCU for Automotive Body and Gateway Applications
♠ Product Description
| Product Attribute | Attribute Value |
| Manufacturer: | STMicroelectronics |
| Product Category: | 32-bit Microcontrollers - MCU |
| RoHS: | Details |
| Series: | SPC560B50L1 |
| Mounting Style: | SMD/SMT |
| Package / Case: | LQFP-64 |
| Core: | e200z0h |
| Program Memory Size: | 512 kB |
| Data RAM Size: | 32 kB |
| Data Bus Width: | 32 bit |
| ADC Resolution: | 10 bit |
| Maximum Clock Frequency: | 64 MHz |
| Number of I/Os: | 45 I/O |
| Supply Voltage - Min: | 3 V |
| Supply Voltage - Max: | 5.5 V |
| Minimum Operating Temperature: | - 40 C |
| Maximum Operating Temperature: | + 125 C |
| Qualification: | AEC-Q100 |
| Packaging: | Reel |
| Packaging: | Cut Tape |
| Brand: | STMicroelectronics |
| Data RAM Type: | SRAM |
| Data ROM Type: | EEPROM |
| Interface Type: | CAN, I2C, SCI, SPI |
| Moisture Sensitive: | Yes |
| Number of ADC Channels: | 12 Channel |
| Processor Series: | SPC560B |
| Product: | MCU |
| Product Type: | 32-bit Microcontrollers - MCU |
| Program Memory Type: | Flash |
| Factory Pack Quantity: | 1000 |
| Subcategory: | Microcontrollers - MCU |
| Watchdog Timers: | Watchdog Timer |
| Unit Weight: | 0.012335 oz |
♠ 32-bit MCU family built on the Power Architecture® for automotive body electronics applications
The SPC560B40x/50x and SPC560C40x/50x is a family of next generation microcontrollers built on the Power Architecture embedded category.
The SPC560B40x/50x and SPC560C40x/50x family of 32-bit microcontrollers is the latest achievement in integrated automotive application controllers. It belongs to an expanding family of automotive-focused products designed to address the next wave of body electronics applications within the vehicle. The advanced and cost-efficient host processor core of this automotive controller family complies with the Power Architecture embedded category and only implements the VLE (variable-length encoding) APU, providing improved code density. It operates at speeds of up to 64 MHz and offers high performance processing optimized for low power consumption. It capitalizes on the available development infrastructure of current Power Architecture devices and is supported with software drivers, operating systems and configuration code to assist with users implementations.
High-performance 64 MHz e200z0h CPU
– 32-bit Power Architecture® technology
– Up to 60 DMIPs operation
– Variable length encoding (VLE)
Memory
– Up to 512 KB Code Flash with ECC
– 64 KB Data Flash with ECC
– Up to 48 KB SRAM with ECC
– 8-entry memory protection unit (MPU)
Interrupts
– 16 priority levels
– Non-maskable interrupt (NMI)
– Up to 34 external interrupts incl. 18 wakeup lines
GPIO: 45(LQFP64), 75(LQFP100), 123(LQFP144)
Timer units
– 6-channel 32-bit periodic interrupt timers
– 4-channel 32-bit system timer module
– Software watchdog timer
– Real-time clock timer
16-bit counter time-triggered I/Os
– Up to 56 channels with PWM/MC/IC/OC
– ADC diagnostic via CTU
Communications interface
– Up to 6 FlexCAN interfaces (2.0B active) with 64-message objects each
– Up to 4 LINFlex/UART
– 3 DSPI / I2C
Single 5 V or 3.3 V supply
10-bit analog-to-digital converter (ADC) with up to 36 channels
– Extendable to 64 channels via external multiplexing
– Individual conversion registers
– Cross triggering unit (CTU)
Dedicated diagnostic module for lighting
– Advanced PWM generation
– Time-triggered diagnostic
– PWM-synchronized ADC measurements
Clock generation
– 4 to 16 MHz fast external crystal oscillator (FXOSC)
– 32 kHz slow external crystal oscillator (SXOSC)
– 16 MHz fast internal RC oscillator (FIRC)
– 128 kHz slow internal RC oscillator (SIRC)
– Software-controlled FMPLL
– Clock monitor unit (CMU)
Exhaustive debugging capability
– Nexus1 on all devices
– Nexus2+ available on emulation package (LBGA208)
Low power capabilities
– Ultra-low power standby with RTC, SRAMand CAN monitoring
– Fast wakeup schemes
Operating temp. range up to -40 to 125 °C
