TMS320C6657GZHA Fixed/Float Pt DSP
♠ Product Description
| Product Attribute | Attribute Value |
| Manufacturer: | Texas Instruments |
| Product Category: | Digital Signal Processors & Controllers - DSP, DSC |
| Product: | DSPs |
| Series: | TMS320C6657 |
| Mounting Style: | SMD/SMT |
| Package / Case: | FCBGA-625 |
| Core: | C66x |
| Number of Cores: | 2 Core |
| Maximum Clock Frequency: | 1 GHz, 1.25 GHz |
| L1 Cache Instruction Memory: | 2 x 32 kB |
| L1 Cache Data Memory: | 2 x 32 kB |
| Program Memory Size: | - |
| Data RAM Size: | - |
| Operating Supply Voltage: | 900 mV to 1.1 V |
| Minimum Operating Temperature: | - 40 C |
| Maximum Operating Temperature: | + 100 C |
| Packaging: | Tray |
| Brand: | Texas Instruments |
| Data Bus Width: | 32 bit |
| Instruction Type: | Fixed/Floating Point |
| Interface Type: | EMAC, I2C, Hyperlink, PCIe, RapidIO, UPP |
| MMACS: | 80000 MMACS |
| Moisture Sensitive: | Yes |
| Number of I/Os: | 32 I/O |
| Number of Timers/Counters: | 10 Timer |
| Product Type: | DSP - Digital Signal Processors & Controllers |
| Factory Pack Quantity: | 60 |
| Subcategory: | Embedded Processors & Controllers |
| Supply Voltage - Max: | 1.1 V |
| Supply Voltage - Min: | 900 mV |
| Unit Weight: | 0.173752 oz |
♠ TMS320C6655 and TMS320C6657 Fixed and Floating-Point Digital Signal Processor
The C665x are high performance fixed- and floating-point DSPs that are based on TI's KeyStone multicore architecture. Incorporating the new and innovative C66x DSP core, this device can run at a core speed of up to 1.25 GHz. For developers of a broad range of applications, both C665x DSPs enable a platform that is power-efficient and easy to use. In addition, the C665x DSPs are fully backward compatible with all existing C6000™ family of fixed- and floating-point DSPs.
• One (C6655) or Two (C6657) TMS320C66x™ DSP Core Subsystems (CorePacs), Each With
– 850 MHz (C6657 only), 1.0 GHz, or 1.25 GHz C66x Fixed- and Floating-Point CPU Core
– 40 GMAC per Core for Fixed Point @ 1.25 GHz
– 20 GFLOP per Core for Floating Point @ 1.25 GHz
• Multicore Shared Memory Controller (MSMC)
– 1024KB MSM SRAM Memory (Shared by Two DSP C66x CorePacs for
C6657)
– Memory Protection Unit for Both MSM SRAM and DDR3_EMIF
• Multicore Navigator
– 8192 Multipurpose Hardware Queues with Queue Manager
– Packet-Based DMA for Zero-Overhead Transfers
• Hardware Accelerators
– Two Viterbi Coprocessors
– One Turbo Coprocessor Decoder
• Peripherals
– Four Lanes of SRIO 2.1
– 1.24, 2.5, 3.125, and 5 GBaud Operation Supported Per Lane
– Supports Direct I/O, Message Passing
– Supports Four 1×, Two 2×, One 4×, and Two 1× + One 2× Link Configurations
– PCIe Gen2
– Single Port Supporting 1 or 2 Lanes
– Supports up to 5 GBaud Per Lane
– HyperLink
– Supports Connections to Other KeyStone Architecture Devices Providing Resource Scalability
– Supports up to 40 Gbaud
– Gigabit Ethernet (GbE) Subsystem
– One SGMII Port
– Supports 10-, 100-, and 1000-Mbps Operation
– 32-Bit DDR3 Interface
– DDR3-1333
– 4GB of Addressable Memory Space
– 16-Bit EMIF
– Universal Parallel Port
– Two Channels of 8 Bits or 16 Bits Each
– Supports SDR and DDR Transfers
– Two UART Interfaces
– Two Multichannel Buffered Serial Ports (McBSPs)
– I²C Interface
– 32 GPIO Pins
– SPI Interface
– Semaphore Module
– Up to Eight 64-Bit Timers
– Two On-Chip PLLs
• Commercial Temperature:
– 0°C to 85°C
• Extended Temperature:
– –40°C to 100°C
• Power Protection Systems
• Avionics and Defense
• Currency Inspection and Machine Vision
• Medical Imaging
• Other Embedded Systems
• Industrial Transportation Systems
