SPC5675KFF0MMS2 32bit Microcontrollers MCU 2MFlash 512KSRAM EBI
♠ Product Description
| Product Attribute | Attribute Value |
| Manufacturer: | NXP |
| Product Category: | 32-bit Microcontrollers - MCU |
| RoHS: | Details |
| Series: | MPC5675K |
| Mounting Style: | SMD/SMT |
| Package / Case: | BGA-473 |
| Core: | e200z7d |
| Program Memory Size: | 2 MB |
| Data RAM Size: | 512 kB |
| Data Bus Width: | 32 bit |
| ADC Resolution: | 12 bit |
| Maximum Clock Frequency: | 180 MHz |
| Supply Voltage - Min: | 1.8 V |
| Supply Voltage - Max: | 3.3 V |
| Minimum Operating Temperature: | - 40 C |
| Maximum Operating Temperature: | + 125 C |
| Qualification: | AEC-Q100 |
| Packaging: | Tray |
| Analog Supply Voltage: | 3.3 V/5 V |
| Brand: | NXP Semiconductors |
| Data RAM Type: | SRAM |
| I/O Voltage: | 3.3 V |
| Moisture Sensitive: | Yes |
| Processor Series: | MPC567xK |
| Product: | MCU |
| Product Type: | 32-bit Microcontrollers - MCU |
| Program Memory Type: | Flash |
| Factory Pack Quantity: | 420 |
| Subcategory: | Microcontrollers - MCU |
| Watchdog Timers: | Watchdog Timer |
| Part # Aliases: | 935310927557 |
| Unit Weight: | 0.057260 oz |
♠ MPC5675K Microcontroller
The MPC5675K microcontroller, a SafeAssure solution, is a 32-bit embedded controller designed for advanced driver assistance systems with RADAR, CMOS imaging, LIDAR and ultrasonic sensors, and multiple 3-phase motor control applications as in hybrid electric vehicles (HEV) in automotive and high temperature industrial applications.
A member of NXP Semiconductor’s MPC5500/5600 family, it contains the Book E compliant Power Architecture technology core with Variable Length Encoding (VLE). This core complies with the Power Architecture embedded category, and is 100 percent user mode compatible with the original Power PC™ user instruction set architecture (UISA). It offers system performance up to four times that of its MPC5561 predecessor, while bringing you the reliability and familiarity of the proven Power Architecture technology.
A comprehensive suite of hardware and software development tools is available to help simplify and speed system design. Development support is available from leading tools vendors providing compilers, debuggers and simulation development environments.
• High-performance e200z7d dual core
— 32-bit Power Architecture technology CPU
— Up to 180 MHz core frequency
— Dual-issue core
— Variable length encoding (VLE)
— Memory management unit (MMU) with 64 entries
— 16 KB instruction cache and 16 KB data cache
• Memory available
— Up to 2 MB code flash memory with ECC
— 64 KB data flash memory with ECC
— Up to 512 KB on-chip SRAM with ECC
• SIL3/ASILD innovative safety concept: LockStep mode and fail-safe protection
— Sphere of replication (SoR) for key components
— Redundancy checking units on outputs of the SoR connected to FCCU
— Fault collection and control unit (FCCU)
— Boot-time built-in self-test for memory (MBIST) and logic (LBIST) triggered by hardware
— Boot-time built-in self-test for ADC and flash memory
— Replicated safety-enhanced watchdog timer
— Silicon substrate (die) temperature sensor
— Non-maskable interrupt (NMI)
— 16-region memory protection unit (MPU)
— Clock monitoring units (CMU)
— Power management unit (PMU)
— Cyclic redundancy check (CRC) units
• Decoupled Parallel mode for high-performance use of replicated cores
• Nexus Class 3+ interface
• Interrupts
— Replicated 16-priority interrupt controller
• GPIOs individually programmable as input, output, or special function
• 3 general-purpose eTimer units (6 channels each)
• 3 FlexPWM units with four 16-bit channels per module
• Communications interfaces
— 4 LINFlex modules
— 3 DSPI modules with automatic chip select generation
— 4 FlexCAN interfaces (2.0B Active) with 32 message objects
— FlexRay module (V2.1) with dual channel, up to 128 message objects and up to 10 Mbit/s
— Fast Ethernet Controller (FEC)
— 3 I2 C modules
• Four 12-bit analog-to-digital converters (ADCs)
— 22 input channels
— Programmable cross triggering unit (CTU) to synchronize ADC conversion with timer and PWM
• External bus interface
• 16-bit external DDR memory controller
• Parallel digital interface (PDI)
• On-chip CAN/UART bootstrap loader
• Capable of operating on a single 3.3 V voltage supply
— 3.3 V-only modules: I/O, oscillators, flash memory
— 3.3 V or 5 V modules: ADCs, supply to internal VREG
— 1.8–3.3 V supply range: DRAM/PDI
• Operating junction temperature range –40 to 150 °C
