PIC18F45K40-I/PT 8bit Microcontrollers MCU 32KB Flash 2KB RAM 256B EEPROM 10bit ADC2 5bit DAC
♠ Product Description
| Product Attribute | Attribute Value |
| Manufacturer: | Microchip |
| Product Category: | 8-bit Microcontrollers - MCU |
| RoHS: | Details |
| Series: | PIC18(L)F4xK40 |
| Mounting Style: | SMD/SMT |
| Package / Case: | TQFP-44 |
| Core: | PIC18 |
| Program Memory Size: | 32 kB |
| Data Bus Width: | 8 bit |
| ADC Resolution: | 10 bit |
| Maximum Clock Frequency: | 64 MHz |
| Number of I/Os: | 36 I/O |
| Data RAM Size: | 2 kB |
| Supply Voltage - Min: | 2.3 V |
| Supply Voltage - Max: | 5.5 V |
| Minimum Operating Temperature: | - 40 C |
| Maximum Operating Temperature: | + 85 C |
| Qualification: | AEC-Q100 |
| Packaging: | Tray |
| Brand: | Microchip Technology / Atmel |
| DAC Resolution: | 5 bit |
| Data RAM Type: | SRAM |
| Data ROM Size: | 256 B |
| Data ROM Type: | EEPROM |
| Interface Type: | I2C, EUSART, SPI |
| Moisture Sensitive: | Yes |
| Number of ADC Channels: | 35 Channel |
| Number of Timers/Counters: | 4 Timer |
| Processor Series: | PIC18F2xK40 |
| Product: | MCU |
| Product Type: | 8-bit Microcontrollers - MCU |
| Program Memory Type: | Flash |
| Factory Pack Quantity: | 160 |
| Subcategory: | Microcontrollers - MCU |
| Tradename: | PIC |
| Watchdog Timers: | Watchdog Timer |
| Unit Weight: | 0.007055 oz |
♠ 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with XLP Technology
These PIC18(L)F26/45/46K40 microcontrollers feature Analog, Core Independent Peripherals and Communication Peripherals, combined with eXtreme Low-Power (XLP) technology for a wide range of general purpose and low-power applications. These 28/40/44 -pin devices are equipped with a 10-bit ADC with Computation (ADCC) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and performing automatic threshold comparisons. They also offer a set of Core Independent Peripherals such as Complementary Waveform Generator (CWG), Windowed Watchdog Timer (WWDT), Cyclic Redundancy Check (CRC)/Memory Scan, Zero-Cross Detect (ZCD) and Peripheral Pin Select (PPS), providing for increased design flexibility and lower system cost.
• C Compiler Optimized RISC Architecture
• Operating Speed:
– DC – 64 MHz clock input over the full VDD range
– 62.5 ns minimum instruction cycle
• Programmable 2-Level Interrupt Priority
• 31-Level Deep Hardware Stack
• Three 8-Bit Timers (TMR2/4/6) with Hardware Limit Timer (HLT)
• Four 16-Bit Timers (TMR0/1/3/5)
• Low-Current Power-on Reset (POR)
• Power-up Timer (PWRT)
• Brown-out Reset (BOR)
• Low-Power BOR (LPBOR) Option
• Windowed Watchdog Timer (WWDT):
– Watchdog Reset on too long or too short interval between watchdog clear events
– Variable prescaler selection
– Variable window size selection
– All sources configurable in hardware or software
